[ Home ] [ Search ] [ Site Map ] [ DIG Course ] [ PDI4 Course ] [ AUT kursus ] [ NXT - NXC ] [ Up ]
Velkommen til Jeppes sideSearchSite MapDIG Course#1>>> Introduction to the Course <<<#2 >>> Getting Started - How to get <<<Getting StartedBoards and Adept Suite#3 >>> First digital design ( Shematic) <<<New ProjectSchematic DesignAdding pinsBASYS_NEXYS_UCF.zip - General user constrain files#4 >>> First VHDL design <<<EE121VHDL moduleLanguage Assist#5 >>> First test bench <<<Stimuli demoClock generatorFirst Test Bench#6 >>> Data types, Operators and Attributes <<<#7 >>> Concurrent VHDL Code <<<MMMI/DIG/Lec07/Primtals_detektor.pdfStructureDataflowWhen ElseWith SelectArray[ Index]#8 >>> Sequential VHDL Code <<<ProcessIf Then ElseCase IsInside a FPGA#9 >>> Signals and Variables: <<<Example Count-onesMMMI/VHDL/KnowHow/Signal_Variable/Ex7_1.zipExample Shiftregister#10 >>>State Machines <<<#11 >>> Case study - Stopwatch <<<#12 >>> Arithmetic circuits <<<#13 >>> Memories <<<#14 >>> PWM versus PPM <<<#15 >>> The HiLo Game <<<#16 >>> <<<#17#18#19 >>> CPU - The Gnome <<<<#20#21#22ExerTest the kitCombinatorial LogicMMMI/Exercises/Xtra/Exer_01_CombLogic/Files_to_add.zipMMMI/Exercises/Xtra/Exer_01_CombLogic/VHDL_Intro1.zipSR-LatchMMMI/Exercises/Xtra/Exer_02_SRlatch/Bitfiles_etc_SR_Latch.zipD-LatchMMMI/Exercises/Xtra/Exer_03_DLatch/Bitfiles_etc_D_Latch.zipD-F/FMMMI/Exercises/Xtra/Exer_04_DFF/Bitfiles_etc_D_FF.zipD-F/F Ce Clr ResMMMI/Exercises/Xtra/Exer_05_DFF_CEcr/Bitfiles_etc_DFF_Extra.zipMMMI/Exercises/Xtra/Exer_05_DFF_CEcr/Exer05_DFFs_extra.zipDebouncherCounter1MMMI/Exercises/Xtra/Diverse/Counter1_demo/Bitfiles_Counterx.zipCounter2..5New Page 1MMMI/Exercises/Xtra/Diverse/Counter1_demo/Counter1_demo.zipMMMI/Exercises/Xtra/Diverse/Counter2_demo/Counter2_demo.zipHintPWM vs. Sigma DeltaNew Page 1MMMI/Exercises/Xtra/Exer_07_PWM_PPM/Bitfiles_etc_PWM_PPM.zipMMMI/Exercises/Xtra/Exer_07_PWM_PPM/Exer_PWM_PPM.zipLinks and HintsFIFO bufferMMMI/Exercises/Xtra/Exer_08_FIFO/Bitfiles.zipMMMI/Exercises/Xtra/Exer_08_FIFO/No06_Fifo_buffer.zipFIFO Test circuitFIFO ComponentProbBCD to 7 SegmMMMI/Problems/No01_BCD27Segm/No1_Bcd27segm_Bitfiles.zipHintMMMI/Problems/No01_BCD27Segm/Hint/BCD_2_7Segment_hint.pdfSimulationSolutions 1Solutions 2Solutions 3Mux Display#1 The SchematicMMMI/Problems/No02_MuxDisplay1/Muxdisplay_ver1.zipMux DisplayClock_scale_ver1Count2bitMux4x4_1x4D2_4EBcd27segm_ver1#2 The VHDL solutionTest_Counter_VHDLMuxDisplay_Ver2Clock_ScaleCount2bit_VHDLMux4x4_1x4_VHDLDec2to4_VHDLBcd27segm_VHDL#3 MuxDisplay3#4 MuxDisplay#6 Non Mux DisplayBcd CounterMMMI/Problems/No03_Bcd_counter/Bitfiles_Etc_Bcd_Counter_v1.zipMMMI/Problems/No03_Bcd_counter/Bitfiles_Etc_BCD_Counter_ver2.zipToggle ButtonMMMI/Problems/No04_Toogle_button/Opgave_Toogle_button.pdfHintStopwatch 1MMMI/Problems/No05_Stopwatch1/Bitfiles_etc_Stopwatch_ver1.zipMMMI/Problems/No05_Stopwatch1/No04_Stopwatch_ver1.zipToggle_button3Cnt999Cnt59TeenthSecLap_time_LatchBlinkingMuxDisplay_ver3My_AND2B1Stopwatch 2MMMI/Problems/No05_Stopwatch2/Bitfiles_etc_Stopwatch_Ver2.zipMMMI/Problems/No05_Stopwatch2/No04_Stopwatch_Ver2.zipToggle_Button3Watch_CounterTeenthSecBlinkingLap_TIme_LatchSTATEM1ALU TestMMMI/Problems/No06_ALU_test1/Bitfiles_etc_ALU_ver1.zipMMMI/Problems/No06_ALU_test1/No05_ALU_ver1.zipUser GuideThe ALUMuxdisplayDisplay SelectionButton SelectionConversionsBinary to BcdMMMI/Problems/No07_Conversions/Bitfiles_etc_Bin2Bcd.zipMMMI/Problems/No07_Conversions/Losning_Bin2Bcd.zipBcd to BinaryMMMI/Problems/No07_Conversions/Bitfiles_etc_Bcd2Bin.zipMMMI/Problems/No07_Conversions/Losning_Bcd2Bin.zipThe HiLo GameMMMI/Problems/No10_HiLoGame/No10_HiLo_game3.zipPlay The GameMMMI/Problems/No10_HiLoGame/Bitfiles_The_HiLo_Game3.zipGame SimulationDiagrams and ComponentsThe DetectorThe Display DriverThe GameThe Game (Alternative)Mux displayLessArithmeticAddersRipple CarryMMMI/Lessons/06_Arithmetics/No1_Adders/Adder_test2.vhdMMMI/Lessons/06_Arithmetics/No1_Adders/FullAdder.vhdCarry LookaheadMMMI/Lessons/06_Arithmetics/No1_Adders/Adder_test3b.vhdFPGA AdditionMMMI/Lessons/06_Arithmetics/No1_Adders/Adder_test1.vhdSubtractorsMultipliersCombinatorial MultipliersMultiply ConstantsSequential MultipliersDivisionMMMI/Lessons/06_Arithmetics/No4_Division/division.vhdMMMI/Lessons/06_Arithmetics/No4_Division/Division8.vhdMMMI/Lessons/06_Arithmetics/No4_Division/Division16.vhdSequential N-bit DivisionMMMI/Lessons/06_Arithmetics/No4_Division/nbit_div/Division_n.vhdConversionsMemoriesROMStatic RAMDynamic RAMSynch. RAMFGPA Mem.F/F basedLUT basedBlock RAMFIFO buffersBRAM basedMMMI/Lessons/07_Memory/No6_FIFObuffers/BRAM_based/test1_fifo1.bitExternal RAM basedIP versionCPUsThe GnomeIntroduction8085GnomeAddressingImmediateDirectInherentAbsoluteRelativeInstructionsMnenomicsOpcodesAdr. MuxProgram CounterInstruction Reg.Instruction Dec.ALUClk processExampleGnomeMMMI/Lessons/08_CPUs/Gnome/10_Gnome/gnome.vhdMMMI/Lessons/08_CPUs/Gnome/10_Gnome/Memory.vhdMMMI/Lessons/08_CPUs/Gnome/10_Gnome/Muxdisplay_ver3b.vhdMMMI/Lessons/08_CPUs/Gnome/10_Gnome/The_Gnome1.schMMMI/Lessons/08_CPUs/Gnome/10_Gnome/demo1.ucfMemoryPicoBlazeMMMI/Lessons/08_CPUs/PicoBl/Picoblaze_Starter1.zipMMMI/Lessons/08_CPUs/PicoBl/Pong5.zipMMMI/Lessons/08_CPUs/PicoBl/pong.zipMMMI/Lessons/08_CPUs/PicoBl/Pong1.pdfIntroductionInstruction setStarter ExampleMMMI/Lessons/08_CPUs/PicoBl/PicoBlaze_Starter_example/picoblaze_starter1_NEXYS.bitMMMI/Lessons/08_CPUs/PicoBl/PicoBlaze_Starter_example/Picoblaze_Starter1.vhdMMMI/Lessons/08_CPUs/PicoBl/PicoBlaze_Starter_example/JTAG_Loader_ROM_form.vhdMMMI/Lessons/08_CPUs/PicoBl/PicoBlaze_Starter_example/Muxdisplay_ver5f.vhdMMMI/Lessons/08_CPUs/PicoBl/PicoBlaze_Starter_example/Timer.vhdMMMI/Lessons/08_CPUs/PicoBl/PicoBlaze_Starter_example/Starter1_rom.vhdMMMI/Lessons/08_CPUs/PicoBl/PicoBlaze_Starter_example/PicoBlaze_System1.schMMMI/Lessons/08_CPUs/PicoBl/PicoBlaze_Starter_example/Picoblaze_Starter1.zipThe ProgramPicoBlaze SystemExerciseToolsExample 1MMMI/Lessons/08_CPUs/PicoBl/04_Example/PicoBlaze_Demo2_minus_KCPSM3.zipMMMI/Lessons/08_CPUs/PicoBl/04_Example/picoblaze_system2.bitMMMI/Lessons/08_CPUs/PicoBl/04_Example/picoblaze_system2_NEXYS.bitProgram example (old)PicoBlaze State MachineStopWatch1 (html)Stopwatch1.psmExample 2 (BASYS)MMMI/Lessons/08_CPUs/PicoBl/05_Example_2/Pong3.zipMMMI/Lessons/08_CPUs/PicoBl/05_Example_2/picoblaze_system2.bitMMMI/Lessons/08_CPUs/PicoBl/05_Example_2/PingPong1.htmExample 2 (NEXYS)ExamplesCurveform generatorsSinusgenerator version 1MMMI/Lessons/11_Curveforms/SinusVer1/sinusgenerator.bitMMMI/Lessons/11_Curveforms/SinusVer1/SinusGen1.zipSinusgenerator version 2MMMI/Lessons/11_Curveforms/SinusVer2/sinusgenerator.bitMMMI/Lessons/11_Curveforms/SinusVer2/Sinusgen2.zipMMMI/Lessons/11_Curveforms/SinusVer2/COE_File_Generator2.xlsmHow to make COE-filesMMMI/Lessons/11_Curveforms/How_to_generate_COE_files/COE_File_Generator.xlsmMMMI/Lessons/11_Curveforms/How_to_generate_COE_files/SinusTabel_Excel2003.xlsMMMI/Lessons/11_Curveforms/How_to_generate_COE_files/S_Curve1.coeMMMI/Lessons/11_Curveforms/How_to_generate_COE_files/Sinus1.coeSPI Slave interfaceMMMI/Lessons/12_SPI/Source_filer.zipSPI SlaveBlok1 (internal comp)FPGA Main1TestbenchXtraAbout the bookXiLinx ISEOld Exercises#1 Introduction#2 Comb Logic#2.1 Decoders#2.2 Mutiplexer#2.3 Combinatorial Ex.#2.4 Boolean equations#3 Latch - Flip/Flop#3.6 T-F/F#4 State MachinesAsync vs SyncMMMI/Exercises/Old/04_Statemachine/No1_Async_vs_Sync/test_state_machines.bitMMMI/Exercises/Old/04_Statemachine/No1_Async_vs_Sync/NEXYS_test_state_machines.bitMMMI/Exercises/Old/04_Statemachine/No1_Async_vs_Sync/Exer4_1_Statemachines1.zipImplementationsLevels of abstractionKiss to FSMMMMI/Exercises/Old/04_Statemachine/No4_Kiss_2_FSM/Kiss2Fsm.vhd#5 Counters & Shiftregisters#5.1 CountersMMMI/Exercises/Old/05_Counters_Shreg/No1_Counters1/TFF_based_counter.sch#5.2 Multiple ClockMMMI/Exercises/Old/05_Counters_Shreg/No2_MultipleClocks/test_speed_cntx.bitMMMI/Exercises/Old/05_Counters_Shreg/No2_MultipleClocks/Speed_Control.zipExample 2MMMI/Exercises/Old/05_Counters_Shreg/No2b_Multiple_Clocks/Counter_ver1.jpg#5.3 Ringcounters#5.4 LIFO StackMMMI/Exercises/Old/05_Counters_Shreg/No4_LIFO_Stack/LIFO_Stack.vhd#5.5 Quadrature encoderMMMI/Exercises/Old/05_Counters_Shreg/No5_Quadrature/Test.vhd#5.6 SPI and UART#5.7 PWM vs. Sigma-DeltaMMMI/Exercises/Old/05_Counters_Shreg/No7_PWM_vs_SigmaDelta/pwm_vs_sigma_delta_v2.bitMMMI/Exercises/Old/05_Counters_Shreg/No7_PWM_vs_SigmaDelta/PWM_vs_Sigma_Delta_v2x.vhdMMMI/Exercises/Old/05_Counters_Shreg/No7_PWM_vs_SigmaDelta/PWM_vs_Sigma_Delta_v2.vhdMMMI/Exercises/Old/05_Counters_Shreg/No7_PWM_vs_SigmaDelta/PWM_vs_Sigma_Delta_v2.ucf#5.8 ADC with FPGA#6 Arithmetic#7 Complex Systems based on FPGA'sMiniLogicWhy ...Digital vs AnalogueTTL vs CMOSTTL - CMOS - PLDsTTLCMOSPALsCPLDFPGASpartan 6Boolean algebraCarnaugh MapsAND-OR-NOTNumber SystemsWhy 10Weighted numbersConversionsGray codeASCII codesCombinatorial logicSequential logicState-MachinesAsync. vs. SyncMMMI/Logic/Statemachines/Asyncronous_Vs_Synchronous_FSM/StateMachines.zipState DiagramsVHDL implementaionsLevels of abstractionRTL DesignFSM DesignASM DesignAd hoc DesignKiss to FSMVHDLIEEELinksProcedures / FunctionsPackages (general)Package (example)Generic ex. 1Generic ex. 2PDI4 CourseTopicsU = RxIC and LDiodesBJTOpAmpFiltersDigitalADC / DACExamplesLight Sensor#0#1MMMI/PDI/Lec01/Falstad_starter_example.pdf#2#3#4#5#6#7#8#9#10#11#12#13#14MMMI/PDI/Lec14/DIG_ELE_Halvledere.pdf#15MMMI/PDI/Lec15/DIG_ELE_Transistor.pdf#16#17#18#19#20AUT kursus#1#2#3#4#5#6#7#8NXT - NXCMMMI/NXT/Lec01/Getting_started_with_NXC.pdfMMMI/NXT/Lec02/2_Rising_Falling_detection.pdfMMMI/NXT/Lec03/3_Tasks_and_State_programming.pdf#1MMMI/NXT/Lec01/NXC_Start_program.txt#2#3#4#5MMMI/NXT/Lec05/Radar_Start_help.txtVersion 1MMMI/NXT/Lec05/Version1/Radar_Version1.txtVersion 2MMMI/NXT/Lec05/Version2/Radar_Version2.txtVersion 3MMMI/NXT/Lec05/Version3/Radar_Version3_mutex.txt#7NXT - PIDPoles and stepresponse#8