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Bcd Counter
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Download here:   Bitfiles_Etc_Bcd_Counter_v1.zip         Help source files for the design included.
 

How to start your design of a BCD counter:

  1. Create a new project with the wanted FPGA series and type.

  2. Unzip the file above to the directory of the project.

  3. Use the Project-Add Source menu to select all the unzipped files (.VHD .SCH and .UCF)

  4. If the project include Schematic component like the one below must you create Schematic symbols for these ones

Create a 4x4-bit Bcd counter which able to count 0000,0001,0002...0009,0010,0011, ..,9998, 9999 and start all over again.
Inspiration can be found in Wakerly chapter 8 (read about the 74xx163 counter).

You could chose between a single Bcd counter which could be combined (actually 4 counters) in a schematic, alternatively could you create a "pure" VHDL solution. 

NB! Next task will be watch counter like 00:00:00 to 23:59:59

The Muxdisplay_Ver3 will deliver a frequency at 1000Hz for the counter.

Note! The Schematic above seems to give some warning - try to get rid of them in your design

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Extra assignment: Use the free RCO output to stop the counter when ever it reaches 9999.  Enable must be set first 0 then 1 in order to restart
 

Alternative solution of the Bcd Counter

Use Sw0 to select between UP/DOWN count.  Sw1=1 will reset so be sure to set at 0
Btn3..0 will increase/decrease each number (and the ones above)
 
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Download here for the alternative solution:   Bitfiles_Etc_BCD_Counter_ver2.zip       Help files for the design included.
 

4xBcd Counter - Alternative solution (hint)
 
 

Muxdisplay_ver5d