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State Machines

 

 Topic:

Last updated: 10-08-09

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 The Concept of State Machines:
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Asynchronies Feedback Circuits versus Synchronous State Machines

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State Diagrams

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VHDL implementations with: 1, 2 or 3 processes

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Levels of abstraction
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RTL Design

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FSM Design

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ASM Design

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Ad Hoc Design
 

 More information:
bulletPedroni chapter 8 - State Machines
bulletThis chapter covers the concept nicely - (even I prefer not using the upper/lower notation).
bulletExample 8.1 Bcd counter will be used..
 
Exercises / Problems:
bulletProblem:  BCD Counter, Toggle Button

 

   
 
The concept of State Machines actually part of our daily life. We will all react depending on the state we are in.

Will you always open a newspaper and read when our sitting?

If you sitting in your kitchen (State: SITTING IN THE KITCHEN) you properly will :-)
But hopefully not when your driving you car (State: DRIVING MY CAR)

However if you stopped in a queue at the motorway will properly grab for the newspaper (State: CAR STOPPED).

In order to get into the states SITTING IN THE KITCHEN or DRIVING MY CAR must you perform lost of transactions and hopefully will you always remember which state your in.

 
 
Its hard to understand which frequency controls the human brain - on the other hand will nearly all computer systems (CPUs) be controlled by a common Clock signal with a fixed frequency.
       

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