[ Home ] [ Up ] [ Test_Counter_VHDL ] [ MuxDisplay_Ver2 ] [ Clock_Scale ] [ Count2bit_VHDL ] [ Mux4x4_1x4_VHDL ] [ Dec2to4_VHDL ] [ Bcd27segm_VHDL ]
Clock_Scale
[ Up ]

 
 

 

Last updated: 21-07-09

 
 

Hint:  Clock_Scale
   

 

 

 

 

 

 

 

 

 

 

 
 

Simulation example:  Clock_Scale
 
 

TB_Clock_Scale