Spartan 6


	Inside a FPGA – Reduced and simplified

	The latest product families from Xilinx the Virtex 6 and the Spartan 6 Family. Just to get the better understanding about the internal structures in "real life" FPGA's can a few figures from the documentation (over 1000 pages) be found below. http://www.pldesignline.com/219100198;jsessionid=QJWEE2MLDCBEHQE1GHOSKH4ATMY32JVN?pgno=1 The link above gives a User Guide Lite to Spartan 6 family.
	CLB = 2 Slices = 8 LUTs (6 inputs) + 16 Flip/Flops



	The M-Slice can act as distributed Memory and Shift Register - Logic and Arithmetic (Fast Carry) 25%

	The L-Slice Logic and Arithmetic (Fast Carry) 25%

	The X-Slice for Logic only - 50% of the Slices in a FPGA